Job Information
MIT Lincoln Laboratory Digital Hardware Design Engineer - Laser Communications (Associate Staff)) in Lexington, Massachusetts
MIT Lincoln Laboratory is a federally funded research and development center (https://www.ll.mit.edu/about/organization/federally-funded-research-and-development-centers) (FFRDC) sponsored by the Department of Defense and operated by the Massachusetts Institute of Technology. FFRDCs are not-for-profit organizations tasked with assisting the U.S. government with scientific research and analysis, systems development, and systems acquisition to provide novel, cost-effective solutions to complex government problems.
The Laser Communications Group (https://www.ll.mit.edu/r-d/communication-systems/laser-communications) designs, prototypes, analyzes, and tests laser communications systems suitable for a variety of government platforms and environments. Additionally, our research team develops techniques to mitigate fluctuations in signal power caused by turbulence and to lessen wavefront distortions. We perform atmospheric modeling and simulation, and build accurate acquisition, tracking, and pointing subsystems to support highly directional, low-probability-of-intercept communication links. Major efforts include the demonstration of a low-cost, high-performance airborne laser communications terminal, and development of the nation’s leading independent lasercom interoperability testing facility. We also provide subject matter expertise to the US government on all aspects of laser communications.
Job Description
The Laser Communications Group seeks a full-time engineer to join an experienced team spanning all aspects of the design of high-fidelity hardware for high-speed optical communications systems, targeting high reliability space environments. Most designs will be FPGA and PCB based for flexibility, although ASIC designs may be preferred for certain projects. Candidate should be motivated and proactive, working closely with a dynamic team, solving challenging problems with direct impact on national security.
What to expect: • Day-to-day work in design, bring-up, and integration of high-fidelity modem and networking hardware for laser communications. Our boards marry the black magic of high-speed digital and analog design with the rigor of high-reliability space-bound hardware design. • Collaboration with electrical, mechanical, systems, optical, software, and HDL engineers to jointly develop and implement high-speed digital signal processing and control systems. • Regularly interfacing with stakeholders to understand and influence requirements, and to anticipate the evolution of requirements over time. Presenting progress to stakeholders periodically. • Supporting explorations of future concepts and architectures including but not limited to next gen lasercom terminal definition, advanced networking architectures, and assured PNT (Position, Navigation, and Timing) over lasercom. • Develop into a subject matter expert on matters of high-speed board design, space electronics, and the DSP, digital, and networking functions vital to future lasercom architectures
Requirements:
• Minimum Bachelor of Science in Computer Engineering, Electrical Engineering, or similar discipline. A relevant Master's degree will be accepted in lieu of 2 years of technical experience, and a PhD for 5 years (see technical experience below). • Experience with FPGAs and complex SoCs • Minimum 5 years technical experience with experience in at least two of the following:
o Schematic capture, PCB design, and bring-up o Signal integrity simulation and analysis o Custom HDL development for FPGAs and complex SoCs o Embedded C/C++ and common scripting languages
Preferred qualifications: • Active Top Secret or higher security clearance • Experience designing high reliability electronics, including derating and part selection • Experience designing for space environments and understanding radiation considerations in high altitude, LEO, GEO, and beyond • Experience with complex Xilinx SoCs and their associated workflows, particularly Versal • Experience with high-speed data links, SERDES, and implementing modern memory architectures such as DDR4 • Experience with Ansys Circuit/HFSS/SIwave, HyperLynx, and/or HSPICE • Experience with the Mentor Graphics suite of tools, particularly Xpedition • Prior demonstrated technical project leadership and management • Familiarity with networking protocols and concepts, spanning Ethernet to Software Defined Networking • Experience implementing digital signal processing in programmable logic, particularly for communications • Experience implementing networking functions in programmable logic
At MIT Lincoln Laboratory, our exceptional career opportunities include many outstanding benefits to help you stay healthy, feel supported, and enjoy a fulfilling work-life balance. Benefits offered to employees include:
Comprehensive health, dental, and vision plans
MIT-funded pension
Matching 401K
Paid leave (including vacation, sick, parental, military, etc.)
Tuition reimbursement and continuing education programs
Mentorship programs
A range of work-life balance options
... and much more!
Please visit our Benefits page (https://hr.mit.edu/benefits) for more information. As an employee of MIT, you can also take advantage of other voluntary benefits, discounts and perks (https://hr.mit.edu/benefits/additional) .
Selected candidate will be subject to a pre-employment background investigation and must be able to obtain and maintain a Secret level DoD security clearance.
MIT Lincoln Laboratory is an Equal Employment Opportunity (EEO) employer. All qualified applicants will receive consideration for employment and will not be discriminated against on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, veteran status, disability status, or genetic information; U.S. citizenship is required.
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